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FEMU
原版 master 7e238cc
FEMU: Accurate, Scalable and Extensible NVMe SSD Emulator (FAST'18)
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浏览该文件的文档. 1 #ifndef __FEMU_TIMING_MODEL
2 #define __FEMU_TIMING_MODEL
#define MLC_UPPER_PAGE_READ_LATENCY_NS
Definition: nand.h:20
pthread_spinlock_t chnl_locks[FEMU_MAX_NUM_CHNLS]
Definition: nvme.h:1305
uint8_t flash_type
Definition: nvme.h:1339
int64_t cupg_rd_lat_ns
Definition: nvme.h:1310
femu相关控制参数和数据成员
Definition: nvme.h:1184
@ QLC
Definition: nand.h:87
int64_t advance_chip_timestamp(FemuCtrl *n, int lunid, uint64_t now, int opcode, uint8_t page_type)
Definition: timing.c:72
int64_t chnl_pg_xfer_lat_ns
Definition: nvme.h:1319
int64_t upg_wr_lat_ns
Definition: nvme.h:1313
#define QLC_CENTER_LOWER_PAGE_WRITE_LATENCY_NS
Definition: nand.h:60
int64_t advance_chip_timestamp(FemuCtrl *n, int lunid, uint64_t now, int opcode, uint8_t page_type)
Definition: timing.c:72
static int64_t get_blk_erase_latency(int flash_type)
Definition: nand.h:152
volatile int64_t chip_next_avail_time[FEMU_MAX_NUM_CHIPS]
Definition: nvme.h:1302
static int64_t get_page_read_latency(int flash_type, int page_type)
Definition: nand.h:142
int64_t lpg_rd_lat_ns
Definition: nvme.h:1312
@ NVME_CMD_WRITE
Definition: nvme.h:340
int64_t lpg_wr_lat_ns
Definition: nvme.h:1317
#define TLC_UPPER_PAGE_WRITE_LATENCY_NS
Definition: nand.h:38
int64_t clpg_wr_lat_ns
Definition: nvme.h:1316
@ NVME_CMD_OC_READ
Definition: nvme.h:351
#define QLC_UPPER_PAGE_WRITE_LATENCY_NS
Definition: nand.h:62
#define MLC_BLOCK_ERASE_LATENCY_NS
Definition: nand.h:24
#define QLC_LOWER_PAGE_READ_LATENCY_NS
Definition: nand.h:54
#define TLC_UPPER_PAGE_READ_LATENCY_NS
Definition: nand.h:34
@ NVME_CMD_OC_ERASE
Definition: nvme.h:349
#define TLC_CHNL_PAGE_TRANSFER_LATENCY_NS
Definition: nand.h:40
#define MLC_LOWER_PAGE_READ_LATENCY_NS
Definition: nand.h:19
#define QLC_BLOCK_ERASE_LATENCY_NS
Definition: nand.h:65
@ NVME_CMD_OC_WRITE
Definition: nvme.h:350
pthread_spinlock_t chip_locks[FEMU_MAX_NUM_CHIPS]
Definition: nvme.h:1303
#define QLC_CENTER_UPPER_PAGE_READ_LATENCY_NS
Definition: nand.h:56
#define QLC_CHNL_PAGE_TRANSFER_LATENCY_NS
Definition: nand.h:64
#define QLC_UPPER_PAGE_READ_LATENCY_NS
Definition: nand.h:57
#define TLC_LOWER_PAGE_WRITE_LATENCY_NS
Definition: nand.h:36
#define MLC_LOWER_PAGE_WRITE_LATENCY_NS
Definition: nand.h:21
#define QLC_CENTER_LOWER_PAGE_READ_LATENCY_NS
Definition: nand.h:55
void set_latency(FemuCtrl *n)
Definition: timing.c:3
#define QLC_LOWER_PAGE_WRITE_LATENCY_NS
Definition: nand.h:59
@ MLC
Definition: nand.h:85
int64_t cpg_rd_lat_ns
Definition: nvme.h:1309
static int64_t get_page_write_latency(int flash_type, int page_type)
Definition: nand.h:147
int64_t upg_rd_lat_ns
Definition: nvme.h:1308
int64_t cpg_wr_lat_ns
Definition: nvme.h:1314
int64_t advance_channel_timestamp(FemuCtrl *n, int ch, uint64_t now, int opcode)
Definition: timing.c:38
int64_t advance_channel_timestamp(FemuCtrl *n, int ch, uint64_t now, int opcode)
Definition: timing.c:38
@ TLC
Definition: nand.h:86
#define TLC_BLOCK_ERASE_LATENCY_NS
Definition: nand.h:41
volatile int64_t chnl_next_avail_time[FEMU_MAX_NUM_CHNLS]
Definition: nvme.h:1304
#define TLC_LOWER_PAGE_READ_LATENCY_NS
Definition: nand.h:32
int64_t cupg_wr_lat_ns
Definition: nvme.h:1315
#define MLC_CHNL_PAGE_TRANSFER_LATENCY_NS
Definition: nand.h:23
@ NVME_CMD_READ
Definition: nvme.h:341
int64_t blk_er_lat_ns
Definition: nvme.h:1318
#define MLC_UPPER_PAGE_WRITE_LATENCY_NS
Definition: nand.h:22
void set_latency(FemuCtrl *n)
Definition: timing.c:3
#define QLC_CENTER_UPPER_PAGE_WRITE_LATENCY_NS
Definition: nand.h:61
int64_t clpg_rd_lat_ns
Definition: nvme.h:1311
#define TLC_CENTER_PAGE_READ_LATENCY_NS
Definition: nand.h:33
#define TLC_CENTER_PAGE_WRITE_LATENCY_NS
Definition: nand.h:37
#define femu_err(fmt,...)
Definition: nvme.h:1511
1.8.17